Adrien Carmagnat of AEDVICES on Functional Safety at DVCon Europe

Adrien Carmagnat of AEDVICES on Functional Safety at DVCon Europe

 

Adrien Carmagnat, AEDVICES’ latest recruit and an expert in verification methodologies, presented a paper on Keeping up with rapidly advancing safety standards at DVCon Europe in Munich last month (2018 Proceedings will be made available late January on the DVCon website).

AEDVICES Consulting is still recruiting new employees and trainees. If you would like to become our next new talent, please feel free to apply!

Adrien Carmagnat – DVCon Europe 2018

We were particularly pleased to present this work since (we believe) it makes a significant contribution to industry discussions on safety standards, and especially the part that Functional Verification has to play.

Furthermore, it is the fruition of an excellent collaboration with our customer, Melexis, and it’s been a great professional development experience for Adrien.

Adrien started as a trainee within AEDVICES Consulting eight months ago having majored in Embedded Systems at Polytech’Sophia. He has been trained on Advanced Verification Methodologies and during his internship he also developed skills in Verification IP and Tool Qualification. To recognise his excellent contribution to the project, we asked Adrien to step up to the plate and make the DVCon presentation, knowing there was a lot of verification expertise in the audience and that this would be a challenge!

Adrien was proud to make the presentation (and a bit nervous, too!). As he said afterwards: “I went on stage with a bit of stress, but it turned out to be easier than I’d expected! The attendees seemed interested. They asked probing questions and even shared some ideas that are prompting me to dig deeper into the subject. They may be useful for another paper next year – who knows! “

 

 

Presentation at DVCon Europe 2018

Adrien CARMAGNAT and François CERISIER, will present their paper during the new edition of DVCon Europe.

The Design and Verification Conference (DVCon) Europe is the leading European event covering the application of languages, tools and intellectual property for the design and verification of electronic systems and integrated circuits. This year, DVCon Europe will be held in Munich from October 24 to October 25.

To attend AEDVICES’ presentation:

Qualification of a Verification IP under Requirement based Verification standards: An Approach to the Verification of the Verification
Thursday October 25, 3:15pm – 4:45pm | Forum 5
Functional Safety Session

More information and registration : DVCon Europe website