Adrien CARMAGNAT and François CERISIER, will present their paper during the new edition of DVCon Europe.
The Design and Verification Conference (DVCon) Europe is the leading European event covering the application of languages, tools and intellectual property for the design and verification of electronic systems and integrated circuits. This year, DVCon Europe will be held in Munich from October 24 to October 25.
To attend AEDVICES’ presentation:
“Qualification of a Verification IP under Requirement based Verification standards: An Approach to the Verification of the Verification”
Thursday October 25, 3:15pm – 4:45pm | Forum 5
Functional Safety Session
More information and registration : DVCon Europe website